賈浩

博士後

Email：jiahao@@gdiist.cn

研究方向：

類腦芯片與系統集成

個人簡介：

2018年本科畢業于電(diàn)子科技大(dà)學電(diàn)子科學與工(gōng)程學院集成電(diàn)路設計及集成系統專業，2023年于複旦大(dà)學取得電(diàn)子信息博士專業學位。博士期間圍繞領域專用處理架構（Domain-Specific Architecture, DSA）的芯片系統設計和領域應用開(kāi)展研究。參與國家自然科學基金、上海市新一(yī)代人工(gōng)智能市級重大(dà)專項等多項課題，具體(tǐ)研究内容包括類腦計算芯片與系統、超低延時行情數據分(fēn)發系統等。完成了粗細粒度可重構的類腦計算系統FPGA原型樣機和ASIC芯片，以及超低延時行情數據分(fēn)發系統FPGA樣機等工(gōng)作，相關研究成果共發表6篇學術論文，并申請發明專利2項。

代表論著：

1. H. Jia, Y. Huan, C. Ding, Y. Yan, et al., "A Domain-Specific Accelerator for Ultra-low Latency Market Data Distribution System," in IEEE Transactions on Industrial Informatics, vol. 19, no. 4, pp. 5465-5475, April 2023.

2. C. Ding, Y. Huan, H. Jia, Y. Yan, et al., "A Hybrid-Mode On-Chip Router for the Large-Scale FPGA-Based Neuromorphic Platform," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 69, no. 5, pp. 1990-2001, May 2022.

3. B. Huang, Y. Yan, H. Jia, C. Ding, et al., "AIOC: An All-in-One-Card Hardware Design for Financial Market Trading System," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 9, pp. 3894-3898, Sept. 2022.

4. H. Chu, Y. Yan, L. Gan, Hao Jia, et al., "A Neuromorphic Processing System With Spike-Driven SNN Processor for Wearable ECG Classification," in IEEE Transactions on Biomedical Circuits and Systems, vol. 16, no. 4, pp. 511-523, Aug. 2022.

5. H. Chu, H. Jia, Y. Yan, Y. Jin, et al., "A Neuromorphic Processing System for Low-Power Wearable ECG Classification," 2021 IEEE Biomedical Circuits and Systems Conference (BioCAS), Berlin, Germany, 2021, pp. 1-5.

6. C. Ding, Y. Huan, H. Jia, Y. Yan, et al., "An Ultra-Low Latency Multicast Router for Large-Scale Multi-Chip Neuromorphic Processing," 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems (AICAS), Washington DC, DC, USA, 2021, pp. 1-4.

7. 賈浩、鄭立榮、梁龍飛、鄒卓、闫钰龍、環宇翔, “一(yī)種基于負載加權的最短路徑路由生(shēng)成方法,” 中(zhōng)國發明專利, CN112511445B, 2020.（已授權）

8. 環宇翔、鄒卓、鄭立榮、丁宸、賈浩、闫钰龍, “用于大(dà)規模類腦計算網絡的種群聚類及種群路由方法,” 中(zhōng)國發明專利, CN112149815B, 2020. （已授權）